All-optical logic gate computing for high-speed parallel information processing

Shuming Jiao; Junwei Liu; Liwen Zhang; Feihong Yu; Guomeng Zuo; Jingming Zhang; Fang Zhao; Weihao Lin; Liyang Shao

doi:10.29026/oes.2022.220010

Abstract

Abstract

Optical computing and optical neural network have gained increasing attention in recent years because of their potential advantages of parallel processing at the speed of light and low power consumption by comparison with electronic computing. The optical implementation of the fundamental building blocks of a digital computer, i.e. logic gates, has been investigated extensively in the past few decades. Optical logic gate computing is an alternative approach to various analogue optical computing architectures. In this paper, the latest development of optical logic gate computing with different kinds of implementations is reviewed. Firstly, the basic concepts of analogue and digital computing with logic gates in the electronic and optical domains are introduced. And then a comprehensive summary of various optical logic gate schemes including spatial encoding of light field, semiconductor optical amplifiers (SOA), highly nonlinear fiber (HNLF), microscale and nanoscale waveguides, and photonic crystal structures is presented. To conclude, the formidable challenges in developing practical all-optical logic gates are analyzed and the prospects of the future are discussed.

Keywords

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Introduction

Figure 1. Full-Size Img PowerPoint

Timeline of advances in optical logic gates and related technologies.

In a modern digital computing system, logic gates are the fundamental building blocks. Sophisticated computation tasks (e.g. a deep learning neural network with complicated structures) can ultimately be decomposed into basic logic gate operations. A logic gate can execute a Boolean function, normally with two binary input values and one binary output value. There are different types of logic gates (e.g. NOT, AND, OR, XOR, NAND, NOR, XNOR) with varying input-output rules, as shown in Table 1. Individual logic gates can be interconnected to create a logical circuit to perform more complex calculations. A number of NOR or alternatively NAND gates can be used to reproduce the function of all other logic gates. Both NOR and NAND gates are referred to as universal gates. Even though some effort has been made to customize a new set of optical logic rules^{26, 27}, the Boolean logic rules are still widely adopted by most works in the field of optical computing.

Figure 2. Full-Size Img PowerPoint

Overview of various optical logic gate schemes.

Logic gates can be realized easily by transistors in an electronic computer. A transistor is a kind of switch in which the binary state of one electronic signal is controlled by another electronic signal. However, there is no optical device exactly analogous to an electronic transistor. The optical implementation of logic gates is a very challenging technology and has received extensive attention in recent decades. A timeline of advances in optical logic gates and related technologies is shown in Fig. 1. The basic idea is to use one light signal to control the binary state of another light signal. The number of logic gate operations per second for an electronic transistor is usually limited within an upper bound by its physical working mechanism. Optical signals can theoretically be processed at a much higher frequency than an electronic transistor. Therefore, ideally, the response time of optical logic gate is very short. Hence, many different schemes for optical logic gate have been proposed. There is no doubt that depending upon the scenarios for which the optical logic gates are applied, the possibilities for the future are endless. At present, optical logic gates are implemented in a wide variety of ways. In this paper, five types of optical logic gates are mainly introduced, spatial encoding of light fields, semiconductor optical amplifiers (SOA), highly-nonlinear fiber (HNLF), microscale and nanoscale waveguides, and photonic crystal structures, as shown in Fig. 2. By comparison with previous literature reviews of all-optical logic gate computing^18-22, this is a more comprehensive summary that includes several optical technologies not covered previously and many recent studies in the past three years. The working principles of different optical logic gate schemes are described in the following sections.

Truth tables of common logic gates (A and B are input binary values; X is logic gate output).

NOT	AND	NAND	OR
$\overline{A}$	$\text{AB}$	$\overline{\text{AB}}$	$\text{A+B}$


NOR	XOR	XNOR
$\overline{\text{A+B}}$	$A \oplus B$	$\overline{A \oplus B}$

CSV Show Table

Computer technology can be divided into two categories: analog computing and digital computing. In the realm of digital computing, logic gates are indispensable devices and have been investigated extensively. An analogue computer models a computational task using continuously varying quantities of physical phenomena. Digital computing uses binary encoding to process discrete quantities. For electronic computers, digital computing is the dominant architecture because it has considerably better accuracy, reliability and flexibility than analogue computing. It is still debatable whether the mainstream architecture of future optical computing will be analogue or digital. Both all-optical analogue computing^1-17 and all-optical digital computing^18-22 have been investigated extensively in the past few decades. All-optical digital computing is at least one of the feasible approaches to achieve the final objective of all-optical computing and artificial intelligence. In addition, a huge amount of data is transmitted worldwide through optical fibers every day and optical signal processing of transmitted data^23-25 is another crucial application for all-optical logic gates. All-optical signal processing of transmitted data includes encoding, decoding, format conversion, encryption, switching, routing, multiplexing, error correction, etc.

Nowadays the global demand for computing is ever-increasing and the development of electronic computers faces bottlenecks of power consumption, heat dissipation and response speed. Compared with electronic computing, optical computing has the potential advantages of high-speed parallel processing and low power consumption.

Spatial encoding of light field

Figure 3. Optical logic gates created by the superposition of spatially encoded transparent thin films: (a) cells encoded for binary input; (b) cells encoded for different logical operations30.

Figure 3. Full-Size Img PowerPoint

Optical logic gates created by the superposition of spatially encoded transparent thin films: (a) cells encoded for binary input; (b) cells encoded for different logical operations³⁰.

Some spatial encoding methods for binary optical logic operations only need very simple and low-cost optical setups, such as two overlapping thin films. The proposed systems can potentially perform binary logic operations in parallel for many input bits simultaneously. However, they generally have the limitation that the input and output binary values are represented in an encoded format. Interconnecting a previous gate’s output to the next gate’s input can be a challenge⁴⁶. Since some non-optical encoding and decoding steps may be required if multiple logic gate operations are cascaded, it is difficult to construct an efficient large-scale fully optical logic gate circuit.

Spatial encoding of the light field is a simple and straightforward way of performing optical logic gate operations. When the light field is spatially encoded with respect to its distribution of intensity, phase, polarization or other dimensions, it can carry a certain amount of binary information. If the light propagates and interacts with a properly encoded mask, this binary information can be transformed according to the rules of binary logic operations. As a simple example of light-intensity spatial encoding, a thin film can be divided into many small cells and each cell can be either transparent or opaque, representing the binary states “1” and “0” respectively. When corresponding cells of two thin films overlap under conventional illumination, the light will be blocked if either cell is opaque, resulting in a dark state (binary state “0”). This is equivalent to the AND logic operation. In fact, all sixteen binary gate operations can be realized by overlapping multiple transparency-encoded thin films with or without spatially encoded light illumination patterns^28-32. A representative scheme is described in ref.³⁰.

For inputs A and B, the four combinations of binary values are represented by a cell consisting of four sub-cells. Only one of the four sub-cells will be white (transparent) and the remaining three are black (opaque) as shown in Fig. 3(a). Then the input cell denoting A & B and a particular gate cell are aligned and overlapped. Each gate cell is also composed of four sub-cells and different gate cells are encoded according to the truth table, as shown in Fig. 3(b). Finally, in the overlapping result, a cell is “0” if all the sub-cells are black and “1” if any sub-cell is white regardless of its position. This optical logic gate scheme is similar to the visual cryptography concept^33-35, where multiple layers of thin films are overlapped for image pattern hiding.

In a recent work⁴³, a diffractive neural network system has been employed to perform optical logic gate operations, shown in Fig. 4. An input coherent plane light wave is spatially encoded with respect to the intensity distribution according to two input binary values and the type of logic gate operation. Then, the light field propagates forward and is modulated sequentially by several metasurface phase masks placed separately by a certain distance. All the phase mask pixels are optimally encoded. Finally, the light field is focused by the free-space diffraction and phase mask modulation onto one of the two target regions, representing logical outputs “1” and “0” respectively. A recent work shows that the multiple-layer system can be simplified to a single-layer metasurface⁴⁴. Alternatively, the logic states can be represented by linear momentums instead of intensity distributions in a diffractive neural network system⁴⁵.

In addition to transparency, the polarization state of each cell in a mask can be also encoded for optical logic computing^{36, 37}. For example, if one cell is encoded as vertically polarized, a light with horizontal polarization direction will be blocked. However, controlling the output light intensity by modulating the polarization of light can be suboptimal. A direct representation of binary bit values with the same light intensity and two orthogonal polarization states is preferable^38-42. The interaction between polarized light and a number of polarization modulation masks are used to implement logic gates^40-42. One polarized optical input and one electronic input controlling the mask can jointly be converted to a polarized optical logic gate output.

$Figure 4. Performing logic gate operations optically with a diffractive neural network system. Figure reproduced from ref.43, under a Creative Commons Attribution 4.0 International License.$

Figure 4. Full-Size Img PowerPoint

Performing logic gate operations optically with a diffractive neural network system. Figure reproduced from ref.⁴³, under a Creative Commons Attribution 4.0 International License.

Semiconductor optical amplifiers (SOA)

An SOA is a compact semiconductor device that can be controlled to amplify a light signal. There are several nonlinear effects in SOA, including cross-gain modulation, cross-phase modulation, four-wave mixing and cross-polarization modulation, which can be exploited to design logic gates^{47, 48}. SOAs can either operate logic functions alone or in collaboration with interferometric architectures.

Cross-gain modulation (XGM)

Other logic gates such as NOR, AND, NAND and AND–NOR can be implemented with different SOA configurations using XGM as well^49-52. For example, if one probe signal in Fig. 5(a) is replaced with a clock signal with constant non-zero intensity shown in Fig. 5(b), a NAND gate can be realized⁵¹. The system will only have a zero output when both A and B are 1.

In this system, two input light signals A and B are simultaneously transmitted to two SOAs for corresponding optical signal amplification. The output signals of the two SOAs are combined. When both A and B are 0, the output will be certainly 0 since there is no input probe signal. When A and B are both 1, the output will be still 0 since both two SOAs block the pass of probe signals. However, when A=0, B=1 or A=1, B=0, the probe signal will pass one of the SOAs and the output signal is 1. These results are consistent with the XOR logic gate rules.

Figure 5. Full-Size Img PowerPoint

(a) XOR gate with two SOAs based on XGM effect (input A and B). (b) NAND gate with two SOAs based on XGM effect (input A and B).

XGM has been investigated extensively to design optical logic gates with SOA^49-53. It is assumed that there are two input light beams for each SOA. One is the probe light and the other is the much stronger pump light. The probe light cannot pass through the SOA when the pump light saturates it. The probe light can go through the SOA when the pump light is absent. There is an inverse relationship between the intensity of the output probe light and pump light, referred to as the XGM effect. An XOR gate can be realized using two SOAs based on the XGM effect⁵⁴, as shown in Fig. 5(a).

Cross-phase modulation (XPM)

Two input signals A and B are both used as the pump light and there is an additional probe light signal. Because of XPM, the output probe signal will have different frequency spectra when the two input signals are both 1 ( ${P}_{11}$ ) or only one input signal is 1 ( ${P}_{10}$ ). By performing bandpass filtering at the selected frequency, various logic gates can be implemented and the filtered light intensity is taken as the output of the logic gate.

Figure 6. Optical logic gates with SOA based on T-XPM: (a) optical setup; (b) frequency spectrum of the output probe signal. Figure reproduced with permission from ref.56, © The Optical Society.

Figure 6. Full-Size Img PowerPoint

Optical logic gates with SOA based on T-XPM: (a) optical setup; (b) frequency spectrum of the output probe signal. Figure reproduced with permission from ref.⁵⁶, © The Optical Society.

The pump light injected into a SOA will modulate not only the amplitude but also the phase of probe light. The XPM is more commonly combined with interferometric architectures to implement optical logic gates. However, a transient cross-phase modulation (T-XPM) with picosecond-pulse injection can be employed to implement various logic gates using a single SOA and band pass filters^{55, 56}, shown in Fig. 6.

Four-wave mixing (FWM)

An alternative approach of designing logic gates is based on the phase relationship^60-63. The binary logic values 0 and 1 are represented by the phase 0 and ${\rm{\pi}}$ of input (or output) signal respectively. The input signals at ${\omega }_{1}$ and ${\omega }_{2}$ carry data and the input signal at ${\omega }_{3}$ has a constant phase. The constant phase can become 0 after cancellation. Therefore the phase of idle signal is ${\varphi }_{4}={\varphi }_{1}+{\varphi }_{2}$ . If ${\varphi }_{1}={\rm{\pi}}$ , ${\varphi }_{2}={\rm{\pi}}$ , and ${\varphi }_{4}=2{\rm{\pi}}$ (equivalent to 0), an XOR gate operation can be performed base on this relationship.

When FWM is combined with other effects such as XGM and T-XPM, a multi-function reconfigurable system for multiple types of logic gates can be constructed^64-68.

Figure 7. Full-Size Img PowerPoint

(a) Four-wave mixing. (b) Degenerate four-wave mixing.

As shown in Fig. 7, FWM occurs when three input signals ${\omega }_{1}$ , ${\omega }_{2}$ and ${\omega }_{3}$ with different frequencies, or two input signals ${\omega }_{1}$ and ${\omega }_{2}$ with different frequencies, are transmitted to SOA. The latter case is referred to as degenerate FWM. In FWM, a new idle signal with a different frequency ${\omega }_{4}$ $\left({\omega }_{4}={\omega }_{1}+{\omega }_{2}-{\omega }_{3}\right)$ will be yielded. If the original phases of the three input signals are ${\varphi }_{1}$ , ${\varphi }_{2}$ and ${\varphi }_{3}$ respectively, the phase of the idle signal will be ${\varphi }_{4}\left({\varphi }_{4}={\varphi }_{1}+{\varphi }_{2}-{\varphi }_{3}\right)$ . For the degenerate case, the idle signal will have a frequency of ${\omega }_{3}\left({\omega }_{3}=2{\omega }_{1}-{\omega }_{2}\right)$ and a phase of ${\varphi }_{3}\left({\varphi }_{3}=2{\varphi }_{1}-{\varphi }_{2}\right)$ .

For degenerate FWM, the idle signal can only be generated when two input signals at ${\omega }_{1}$ and ${\omega }_{2}$ are both present, which can be considered as an inherent AND gate⁵⁷. Alternatively, when one input signal ${\omega }_{1}$ is constantly non-zero and one of the other two signals ${\omega }_{2}$ and ${\omega }_{3}$ is non-zero or both are non-zero, the same idle signal can be generated if $2{\omega }_{1}{-}{\omega }_{2}=2{\omega }_{3}-{\omega }_{1}$ . This is equivalent to an OR operation⁵⁸.

In addition, it should be noted that FWM only occurs when the polarization states of all the input signals are identical. The idle signal generated will also have the same polarization state. Logic gate computing with degenerate FWM can be implemented using this property⁵⁹. For example, two input signals are encoded as being in one of two orthogonal polarization directions r or s representing binary input values 0 or 1 respectively. When both input signals have identical polarization states, the intensity of the output idler signal will be non-zero (representing 1). Otherwise, the idler signal will not be generated and has zero intensity (representing 0). Thus, an XNOR gate is obtained. Further, by only detecting the intensity of the idler signal in only one polarization direction, a logic value 1 is only obtained when both input signals are 0 (r state) or both input signals are 1 (s state). Consequently, NOR and AND gates can be realized.

Cross-polarization modulation (CPM)

Figure 8. Full-Size Img PowerPoint

Optical AND logic gates with SOA based on CPM.

The CPM in an SOA can modify the polarization state of the input signal and has been investigated for implementing different logic gates such as XOR, AND, OR and NAND^69-73. As an example, we use the implementation of an AND gate⁷² to illustrate the working principle of CPM, as shown in Fig. 8. A pump signal and a probe signal at two different frequencies are injected into the SOA. A polarizer is placed in the output of the SOA. Originally, the polarization direction of the probe signal is orthogonal to that of the polarizer. If the probe signal alone is 1, the final orthogonally polarized output signal passing through the polarizer will also be 0. If the input probe signal is 0, regardless of the pump signal intensity, it is evident that the final probe output will be 0. When both the probe signal and pump signal are present, the pump signal changes the polarization state of the probe signal because of CPM. Then the polarization directions of the probe signal and polarizer will be only partially orthogonal and some amount of the probe signal will pass through the polarizer. In consequence, the output probe signal will only be 1 under this circumstance resulting in an AND gate.

SOA-assisted interferometric architectures

The XPM effect in SOA can impose a phase shift on the input light signal and the phase change can be converted to a more easily detectable intensity change by interference. Consequently, SOA-assisted interferometric architectures have been explored extensively. SOA is most commonly combined with Mach–Zehnder interferometer (MZI) and Sagnac interferometer⁷⁴.

SOA-MZI configuration

Figure 9. Full-Size Img PowerPoint

SOA-MZI configuration: (a) copropagation; (b) counterpropagation.

In the SOA-MZI configuration, two SOAs are usually placed in the upper and lower arms respectively. Copropagation^75-85 and counterpropagation^86-88 are two typical configurations of SOA-assisted MZI, as shown in Fig. 9. The operating principles of these two configurations are similar. Two data signals A and B are each launched into one of the two arms, correspondingly. A probe signal (clock pulse) is split equally into two arms and recombined at the T-port through two 3 dB couplers (1∶1 couplers) in the MZI. From the working mechanism of MZI, the output probe signal from the upper arm and that from the lower arm will have a ${\rm{\pi}}$ phase difference if both data signals are 0. There will be destructive interference and the output probe signal will be also 0. On the other hand, if both the data signals are 1, the phase of probe signal in each arm will be modified in the same way by XPM in SOA. In the T-port, the final output will still be 0 since the relative phase difference is still ${\rm{\pi }}$ . However, if only the data signal for the upper arm or the lower arm is 1 (the other is 0), the probe signals in the two arms will have an extra phase difference and destructive interference will not occur at the T-port. In this condition, the output probe signal in the T-port will be 1. Consequently, the SOA-MZI configuration can be employed to construct an XOR gate^{75-78, 86-87}. One advantage of the counterpropagation configuration over the copropagation configuraton is that the filters in the output do not need to reject control signals as they propagate inversely⁸⁷.

Other logic gates such as AND and NAND gates can be realized by a slightly modified SOA-MZI system^{79-81, 88}. For example, an AND gate can be realized by removing the data signal in the lower arm or adding an extra probe signal in the upper arm^{79, 80}. When two or more SOA-MZI configurations are combined in parallel, more diverse logic gates can be implemented^82-85 including NOR, OR, XNOR and NAND gates.

Sagnac interferometer configuration

Figure 10. SOA assisted Sagnac configuration: (a) XOR gate90; (b) AND gate93.

Figure 10. Full-Size Img PowerPoint

SOA assisted Sagnac configuration: (a) XOR gate⁹⁰; (b) AND gate⁹³.

In this configuration, two SOAs^{90, 91, 93} can be replaced with a single SOA^{92, 94}. When multiple SOA-assisted Sagnac interferometers are cascaded and combined, more logic functions can be realized⁹⁵.

The Sagnac interferometer, referred to as a terahertz optical asymmetric demultiplexer (TOAD)⁸⁹ in some studies, consists of a loop with clockwise and counter-clockwise propagating light signals. SOAs can be placed at appropriate positions in the loop to implement logic gate operations^90-95. An example of an XOR gate configuration with two symmetric SOAs is shown in Fig. 10(a). The probe signal is split equally by a 3 dB coupler and two separate light signals propagate clockwise and counter-clockwise. When both data signals are $0$ and the two SOAs are off, two counterpropagating probe signals finally recombine with phase difference ${\rm{\pi}}$ at the output Port D. This destructive interference will yield an output probe signal of $0$ . When both data signals are 1 , the two symmetric SOAs will impose an identical XPM effect on both clockwise propagating signals and counter-clockwise propagating signals since data A only affects the right SOA and data B only affects the left SOA. The relative phase difference will still be ${\rm{\pi}}$ and the output will be $0$ . When only data A or data B is 1, constructive interference will occur and the output probe signal will be 1 . If only one data signal is used, then there will be an AND relationship between the data signal and probe signal, as shown in Fig. 10(b).

Furthermore, SOA can be combined with other interferometric configurations including Michelson interferometers (MI)⁴³, ultrafast nonlinear interferometers (UNI)^{96-98, 49} and delayed interferometers (DI)^99-103. Compared with the SOA architecture, SOA-assisted interferometer architecture is generally more suitable for integration but its stability is poor and it is affected by additional noise²⁰.

Despite the advantages mentioned above, SOA is relatively slow to take off because of the time it takes to recover gain and phase. A new type of SOA, Quantum dot SOA (QD-SOA) can achieve a much greater speed of operation^104-112. Another two types of SOA, reflective SOAs (RSOA)¹¹³ and photonic crystal SOAs¹¹⁴, have also been attempted recently.

Highly-nonlinear fiber (HNLF)

An HNLF can usually support a much higher data rate than an SOA and the fiber nonlinearity has a femtosecond response time. However, HNLF typically has a length of several meters to several kilometers, presenting a challenging drawback in terms of fabrication and integration.

Figure 11. (a) Multi-function optical logic gate system based on HNLF. (b) Frequency spectrum of the output probe signal and logic gate design. Figure reproduced from ref.116, IEEE.

Figure 11. Full-Size Img PowerPoint

(a) Multi-function optical logic gate system based on HNLF. (b) Frequency spectrum of the output probe signal and logic gate design. Figure reproduced from ref.¹¹⁶, IEEE.

The SPM and CPM of HNLF can be combined with an optical loop mirror interferometric architecture to implement logic gates^{118, 119}. The FWM effect of HNLF can be exploited to realize logic gates based on the idle signal strength¹²⁰, polarization relationship¹²¹ and phase relationship^{122, 123}. The working principles are very similar to the corresponding SOA systems^58-68. Like CPM in SOA, the polarization rotation property of HNLF can be used to perform an XOR operation¹²⁴.

As with the T-XPM in SOA, SPM and TPM can broaden the spectrum of output light signals when input signals are injected into the HNLF. Various logic gates can be implemented using a band pass filter for a selected frequency band^115-117. In a three-input system¹¹⁶ as shown in Fig. 11(a), one probe signal and two data signals are launched into the HNLF. When both data signals are 0 (off), one of them is 1 (on) or both of them are 1 (on), the output probe signal has three different spectra as shown in Fig. 11(b). Certain critical frequencies correspond to different logic operations if the filtered output light signal intensity is used to indicate the output value of the logic gate.

When a light signal propagates through a HNLF, the refractive index of the fiber material will change due to the Kerr effect. Multiple light signals will interact with each other when they pass through a HNLF. Different nonlinearity effects like those in SOAs are also present in a HNLF including self-phase modulation (SPM), cross phase modulation (XPM), four wave mixing (FWM) and polarization rotation.

Microscale and nanoscale waveguide

A waveguide is a structure used to guide electromagnetic waves, including light. It can be fabricated with various materials into diversified geometric forms. An on-chip optical waveguide consisting of a germanium (Ge)-doped silica core and an undoped silica cladding on top of a silicon substrate is widely used. Other common material platforms include but not limited to III-V semiconductor materials, lithium niobate, silicon nitride-on-insulator, and silicon-on-insulator. The common geometries include slab waveguide, ridge waveguide, rib waveguide, slot waveguide, and planar waveguide. Optical logic gates can be implemented by waveguide architectures using various nonlinear effects^125-134 and linear interference^135-143. Waveguide devices can be ultracompact at microscale or even at nanoscale and driven by low power. It has great potential for integration with electronic devices.

General logic gate implementation with waveguide

A high power signal can deplete a low power signal in a silicon waveguide by TPA^{130, 131}. The data signals A and B with a low-power probe signal are injected into a waveguide together. When A and B are both equal to 0 and the total pump signal power is below the TPA threshold, the probe signal will not be absorbed and its output is 1. If there are only signals A or B, or if there are both signals A and B, the probe signal cannot pass through the waveguide due to TPA. This is a NOR gate operation based on TPA. It has been demonstrated that optical logic gates can be implemented in a silicon-on-insulator waveguide by using three nonlinear phenomena including stimulated Raman scattering, the free carrier effect, and XPM¹³³.

The common nonlinearity effects in a waveguide include FWM^126-128, two-photon absorption (TPA)^{130, 131}, free carrier effect^{131, 133}, Raman scattering^{132, 133}, XPM¹³³ and nonlinear slot-waveguide coupling¹³⁴.

The polarization relationship in FWM can be employed to implement various logic gates^{126, 127}. Only when both input signals are co-polarized and aligned to the TM (or TE) mode of the silicon waveguide, FWM will generate an idle output signal of a new frequency. Otherwise, FWM will not occur when the input signals have orthogonal polarization states. The phase relationship in FWM can also be used to implement an XOR gate with a planar waveguide. For example, a chalcogenide waveguide is a suitable candidate for this kind of operation^{128, 129}.

The linear interference of coherent light signals in a waveguide is also important in logic gate design^135-143. It is well known that two light waves with phase difference 0 will interfere constructively (maximum intensity) and two light waves with phase difference ${\rm{\pi}}$ will interfere destructively (minimum intensity). The amplitude of each individual light wave will also affect the final result of interference. There are basically two ways to modulate the amplitude and phase of multiple input light signals to generate a desirable interference output to implement logic gates.

Another approach is the direct modulation of amplitude and phase for each input light signal by an attenuator cooperated with a Soleil–Babinet compensator (SBC)¹³⁹ or a PID regulator¹⁴⁰. In this scheme, the waveguide is a fixed and symmetric two-port Y-shape structure or a three-port structure, including a constant adjustment signal. The path lengths of the two branches are identical. The complex-amplitude modulation coefficients of input amplitude and phase for different types of logic gates are optimized to maximize the extinction between logic 0 and 1¹³⁹, shown in Table 2. It is assumed that the two logic gate input values are ${x}_{1}$ and ${x}_{2}$ (0 or 1). The logic gate output value is indicated by the light intensity of waveguide output ${\left|\alpha {x}_{1}+\beta {x}_{2}+\gamma \right|}^{2}$ . Multimode interference is used to design logic gates with waveguides as well¹⁴³.

One approach is to optimize the length and loss of each waveguide path^{136, 142} as shown in Fig. 12. In Fig. 12(a), the path length from Input A port to the output port is identical to that of Input B port. For two identical coherent input light signals, the output signal will have enhanced intensity. An OR gate can be realized approximately. In Fig. 12(b), the path length from Input B port to the output port is ${\lambda }/{2}$ ( $\lambda$ denotes the wavelength) longer than that of Input A port, corresponding to a phase difference ${\rm{\pi}}$ . When only Input A or Input B is 0, the output will be 1. When both input signals are 1, the output will be 0 due to destructive interference. An XOR gate can thus be realized. In Fig. 12(c), the paths from C and B are ${{3 \lambda }}/{2}$ and ${2 \lambda }\text{}$ longer than that of A respectively, corresponding to phase differences ${\rm{\pi }}$ ( ${3{\rm{\pi }}}$ ) and 0 ( ${4{\rm{\pi }}}$ ). Hence the input signals from C and B will interfere destructively, the input signals from C and A will interfere destructively, but input signals from A and B will interfere constructively. The input signal from C is always present as a reference and the output will be 1 if both the signals from A and B are 0. When only the input signal from A or B is 1, the output will be 0 due to destructive interference. When the input signals from A and B are both 1, the signal will interfere constructively at first, and then the enhanced signal interferes destructively with the signal from C. However, the final output is still 1, since the enhanced combined signal has much higher intensity than the signal from C. An XNOR gate can be realized based on the working principles described above.

The light signals in two-slot silicon waveguides placed close to each other may be coupled under certain conditions¹³⁴. By injecting quasi-TM mode and quasi-TE mode light waves into the input ports of two slot waveguides, the coupling can be enabled or disabled. The signal intensity at the output port of one slot waveguide can indicate the logic gate output. NOT, OR, and AND logic gates can be realized.

Optimized complex-amplitude modulation coefficients of input amplitude and phase for different types of logic gates. Table reproduced with permission from ref.¹³⁹, American Chemical Society.

Types of gates	Optimal parameters			Output light intensities for different input values				Output intensity contrast ratios
Types of gates	α	β	γ	$\left({{\text{0}},{\text{0}}}\right)$	$\left({{\text{1}},{\text{0}}}\right)$	$\left({{\text{0}},{\text{1}}}\right)$	$\left({{\text{1}},{\text{1}}}\right)$	Output intensity contrast ratios
OR	${\text{1}}$	${{\text{e}}}^{\frac{{\text{i}}{\text{2}}{\text{π}} }{{\text{3}}} }$	${\text{0}}$	${\text{0}}$	${\text{1}}$	${\text{1}}$	${\text{1}}$	Infinity
AND	$\dfrac{\text{2}} {\text{3}}$	$\dfrac{\text{2}} {\text{3}}$	$-\dfrac{\text{1} }{\text{3} }$	$\dfrac{\text{1}} {\text{9}}$	$\dfrac{\text{1}} {\text{9}}$	$\dfrac{\text{1}} {\text{9}}$	${\text{1}}$	9∶1
NOT	${\text{1}}$	${\text{0}}$	$-{\text{1}}$	${\text{1}}$	${\text{0}}$	${\text{1}}$	${\text{0}}$	Infinity
NAND	${\text{1}}$	${{\text{e}}}^{\frac{{\text{i}}{\text{2}}{\text{π}} }{{\text{3}}} }$	${{\text{e}}}^{-\frac{{\text{i}}{\text{2}}{\text{π}} }{{\text{3}}} }$	${\text{1}}$	${\text{1}}$	${\text{1}}$	${\text{0}}$	Infinity
NOR	$\dfrac{\text{2}} {\text{3}}$	$\dfrac{\text{2}} {\text{3}}$	$-{\text{1}}$	${\text{1}}$	$\dfrac{\text{1}} {\text{9}}$	$\dfrac{\text{1}} {\text{9}}$	$\dfrac{\text{1}} {\text{9}}$	9∶1
XOR	${\text{1}}$	$-{\text{1}}$	${\text{0}}$	${\text{0}}$	${\text{1}}$	${\text{1}}$	${\text{0}}$	Infinity
XNOR	${\text{1}}$	${\text{1}}$	$-{\text{1}}$	${\text{1}}$	${\text{0}}$	${\text{0}}$	${\text{1}}$	Infinity

CSV Show Table

Figure 12. Optical logic gate based linear interference with waveguide path length differences: (a) OR gate; (b) XOR gate; (c) XNOR gate (A and B: input ports; O: output ports).

Figure 12. Full-Size Img PowerPoint

Optical logic gate based linear interference with waveguide path length differences: (a) OR gate; (b) XOR gate; (c) XNOR gate (A and B: input ports; O: output ports).

Periodically poled lithium niobates (PPLNs) waveguide

By comparison with conventional waveguides, a PPLN waveguide has the unique feature of cascaded second-harmonic generation and difference-frequency generation (SHG+DFG) if the quasi-phase matching (QPM) wavelength condition is satisfied^144-151. When two data signals A and B with different frequencies are transmitted into the PPLN waveguide together with another continuous wave pump signal C, a new signal D at the sum of the frequencies will be generated due to SHG effect. Then it is simultaneously transformed into a pump signal C and a new idle signal E by DFG. Furthermore, the original signal A and B are depleted. An AND gate can be implemented easily by detecting the intensity of D or E when A and B are regarded as two input values. The output signals of two PPLN waveguides with A and B as input signals can be further combined in parallel through a coupler. Then a XOR gate can be realized by detecting the intensity of A (or B) alone in the output. If A and B are both present in the input ports, they will be depleted by SHG+DFG effect and disappear in the output. Nevertheless, A or B as the sole input can pass through the waveguide. The output of a PPLN waveguide with A and B as input signals can also be combined in parallel with the original input signal A, which can act as an OR gate by detecting A in the output. The trade-off is that PPLN needs to work under precise temperature control.

Microring resonator waveguide

Two input pump pulses A and B at another frequency can be designed so that one alone has insufficient power for blue shift but the sum of them reaches the power threshold for blue shift. When a probe light signal is initially tuned to a resonance, the output will be 0. When only A or B is 1, the output will still be 0. However, when both A and B are 1, the probe light will be out of resonance due to the blue shift of the resonant frequency. Consequently, the output will only be 1, in this case, making an AND gate.

Alternatively, the probe light is originally out of resonance at a frequency slightly smaller than f ( $\rm{output=1}$ ). Only when both A and B are 1 will the probe light be at resonance since the resonance frequency increases ( $\rm{output=0}$ ), resulting in a NAND operation.

Figure 13. Microring resonator coupled with a straight waveguide with both pump signal and probe signal are injected into the input of the straight waveguide. Figure reproduced with permission from ref.154, © The Optical Society.

Figure 13. Full-Size Img PowerPoint

Microring resonator coupled with a straight waveguide with both pump signal and probe signal are injected into the input of the straight waveguide. Figure reproduced with permission from ref.¹⁵⁴, © The Optical Society.

A silicon microring resonator is typically coupled to a straight waveguide^152-161, as shown in Fig. 13. A resonance at a certain frequency $\mathrm{f}$ will be generated by this system. The output of the straight waveguide will be nearly zero when the microring resonates. If a pump pulse with sufficient power is applied, the refractive index of the microring will be changed by two-photon absorption (TPA) and the resonance frequency will increase (blue shift).

In addition, AND and NAND gates can be implemented based on FWM instead of TPA¹⁵⁷. In ref.¹⁵⁸, two symmetric microring resonators are cascaded, and the NOR gate is realized by producing an output signal of 0 at either resonance. By properly interconnecting multiple microring configurations¹⁵⁹, various logic gates such as NAND, AND, OR, and NOR can be realized. Its unique feature is that the input and output signals have the same wavelength (or frequency). Varying the resonant frequency between clockwise and counterclockwise propagating light signals can be employed in logic gate design as well¹⁶⁰.

Surface plasmon polariton (SPP)

SPP refers to electron oscillation at the interface between two materials excited by electrons or photons. SSP can overcome diffraction limits and reduce the size of bulky devices to densely integrated single chips. An SPP waveguide is commonly an air slot etched in a very thin metal film (e.g. gold or silver) on a silicon dioxide substrate. The reported device has a size less than 5 μm and can perform very precise phase control and ensure a high extinction ratio up to 24 dB¹⁴². The linear interference is commonly used to implement logic gates in an SPP waveguide^{161-174, 139, 140, 142}. The precision of phase modulation can be improved in various ways^{162, 166}. The coupling of optical signals can assist the design of logic gate as well^{167, 168}. A multifunctional and multichannel all-optical logic gate based on the in-plane coherent control of localized SPP is proposed in ref.¹⁶⁹. An Au nanorod array is first placed on the Si substrate. Three plane-wave beams with the same wavelength including a TM-polarized control beam and two TE-polarized signal beams in opposite directions are coupled to the planar waveguide¹⁶⁹. The output light intensities of nanorods at different spatial locations will provide different outputs for various logic gates.

Nanowire

Nanowires are another type of nanophotonic waveguide device that can be used for optical logic gate computing^175-182. The phase relationship of FWM in a single silicon nanowire can satisfy the requirement of an XOR logic gate^{175, 176}, as with SOA and HNLF.

Figure 14. Full-Size Img PowerPoint

Simple nanowire networks for logic gates (input marked in red and output marked in blue). Figure reproduced with permission from ref.¹⁷⁷, American Chemical Society.

If the polarization and phase of input excitation lasers are properly controlled, the linear interference of plasmon signals allows the approximate implementation of AND, OR, XOR and NOT gate with a simple X or Y-shaped gold nanowire network¹⁷⁷, as shown in Fig. 14. NAND and NOR gates can be realized by cascading an AND gate (OR gate) and a NOT gate^{177, 178}. A common disadvantage of these nanowire schemes is that the extinction ratio between the output signal intensities for 1 and 0 is relatively low for some types of logic gates.

Photonic crystal structures

Photonic crystals are optical structures consisting of periodic geometric lattices. If the frequency of incident light lies within the photonic band gap, the light can be trapped in the photonic crystal structure. Two-dimensional photonic crystals such as a silicon substrate with etched dielectric holes or a system of dielectric rods in air are commonly used. The periodicity of dielectric functions in a photonic crystal can be broken by introducing point defects and line defects (removing or modifying some dielectric rods). Consequently, cavities and waveguides can be constructed within photonic crystals.

Several different effects in photonic crystals have been investigated^{183, 184} to implement optical logic gates including interference of self-collimated light^185-187, multi-mode interference (MMI)^188-190, coherent interference with phase difference, microring resonators and nonlinear effects.

Interference of self-collimated light

As an example of self-collimated light interference¹⁸⁵, a diagonal line defect is created by replacing the high refractive index dielectric rods with low refractive index air, as shown in Fig. 15. As a result, the incident light beams in both the horizontal and vertical directions will be partially reflected by the line defect and transmitted through the line defect. The collimated reflected and transmitted light beams can interfere constructively or destructively if an appropriate initial phase difference is set (e.g. ${{\rm{\pi}} }/{2}$ ). The output light intensity in the horizontal or vertical direction can provide the correct logic gate output results (e.g. OR gate and XOR gate).

Figure 15. Self-collimated light interference in photonic crystals for logic gates (Input: I1 and I2, Output: O1 or O2)185. Figure reproduced with permission from ref.185, © The Optical Society.

Figure 15. Full-Size Img PowerPoint

Self-collimated light interference in photonic crystals for logic gates (Input: I₁ and I_2, Output: O₁ or O₂)¹⁸⁵. Figure reproduced with permission from ref.¹⁸⁵, © The Optical Society.

Multi-mode interference (MMI)

Figure 16. Logic gates based on MMI in a photonic crystal (input in the left and output in the right). Figure reproduced with permission from ref.189, Elsevier.

Figure 16. Full-Size Img PowerPoint

Logic gates based on MMI in a photonic crystal (input in the left and output in the right). Figure reproduced with permission from ref.¹⁸⁹, Elsevier.

In a four-port system based on MMI¹⁸⁹ as shown in Fig. 16, when a light wave is launched into the input port, guided modes will be excited in the middle region connecting input ports and output ports, which propagate periodically in the propagation direction. When there is a certain phase difference between the input light waves of the two ports, the mode intensity distribution is more dense in the area close to one of the two output ports. In this case, one output port will have 1 and another output port will have 0. Four types of logic gates were investigated in ref.¹⁸⁹ with different phase settings. For example, a phase of 0 represents 1 and a phase of ${\rm{\pi}}$ represents 0 for Input 1, and a phase of ${{\rm{\pi}} }/{2}$ represents 1 and a phase of ${{-{\rm{π}}}}/{2}$ represents 0 for Input 2, when the system operates as an XOR gate. For convenience, the initial phase setting can be converted to a path length difference¹⁹⁰.

Linear interference with phase difference

Figure 17. Full-Size Img PowerPoint

Linear interference with phase difference in photonic crystal: (a) OR gate; (b) XOR gate; (c) XNOR gate. Figure reproduced from ref.¹⁹², Elsevier.

As in conventional waveguides, constructive and destructive linear interference between two input light signals with a phase difference of $0$ or ${\rm{\pi}}$ enables logic gates to be designed in photonic crystals^191-200. The phase difference can be generated by variation in path length, as shown in Fig. 17. Some point defects can be added to assist light propagation in the slot waveguide (line defect)^198-200.

Microring resonator structure

Figure 18. Two examples of microring structures in a photonic crystal: (a) AND gate (or NOR gate); (b) OR gate. Figure reproduced from: (a) ref.204, Optical Society of America; (b) ref.206, IEEE.

Figure 18. Full-Size Img PowerPoint

Two examples of microring structures in a photonic crystal: (a) AND gate (or NOR gate); (b) OR gate. Figure reproduced from: (a) ref.²⁰⁴, Optical Society of America; (b) ref.²⁰⁶, IEEE.

In Fig. 18(a), a slot waveguide coupled with two microrings^{201, 203, 204, 208} can operate as either an AND gate or a NOR gate. The two control signals are regarded as Input A and Input B. If the microrings initially resonate, both control signals can change the resonant frequency and the probe light signal P with not be coupled with microrings. The light can pass the slot waveguide in the middle (AND gate). If the two original microrings are out of resonance, the two control signals can activate the microings to couple with the probe signal (NOR gate).

A microring resonator can be fabricated by removing dielectric rods in a photonic crystal. A microring placed near a slot waveguide can control whether light passes through the waveguide or not^201-211. The coupling interactions between multiple slot waveguides and multiple microrings need to be taken into account^{205-207, 209-211}. The constructive and destructive interference of clockwise and counter-clockwise propagating signals within a microring is another critical design consideration^{207, 209}. In addition, a cavity can perform the same function as a microring²¹².

In Fig. 18(b), for Input A, the light field is first induced by the top microring and then induced by the middle ring, including both clockwise and counterclockwise components. Consequently, the output will be 1 and the same can be applied to Input B. When both two input signals are activated, the signal interferes constructively at the output port (OR gate)²⁰⁶. However, if this symmetry is broken, destructive interference will yield other types of logic gates²⁰⁷.

Nonlinear effects

Nonlinear Kerr medium can be inserted into the photonic crystal lattice to form a switch cavity^213-219. The state of the switch can be changed if a control signal has a power over the threshold. Complementary photonic crystal integrated logic devices (CPCL) with universal logic gate integration capabilities are proposed. Examples of other approaches include topological cavity and edge states^{220, 221}, FWM¹²⁹, coupling of neighboring cores in a photonic crystal fiber^{222, 223}, MZI²²⁴, Raman scattering²²⁵, and 3D photonic structure with metamaterial²²⁶.

Discussion, future prospect and conclusion

At present, the capability of an optical logic gate computing system to perform logic functions is still insufficient for it to become a really viable option. In spite of this, several necessary requirements for a qualified logic gate have been proposed²³⁷. Firstly, the cascadability is a critical issue and a demonstration of individual logic gates without interconnections is inadequate. The format of the output optical signal must be consistent with the format of the input signal. For example, cascadability can be a challenging task if the input value is represented by light phase and the output value is represented by light intensity. Besides, the fan-out is a very important element. The output light signal of logic gate must be easily duplicated since it may be used to drive at least two further gates. Moreover, logic-level recovery needs to be taken into account. If the intermediate light signal in a logic gate network has an intensity (phase, polarization angle or others) that deviates from the predefined value for 1 or 0 due to fluctuation and noise, it needs to be restored otherwise the accumulated deviations will finally produce erroneous results. In addition, the isolation between inputs and outputs is critical. It is not desirable that the output of a logic gate feeds back to the input of the logic gate. Unfortunately, the feedback phenomenon is common in many optical systems. Furthermore, the system is required to have no critical biasing. It is undesirable that the system relies on very strict and precise conditions. However, optical systems often rely on high precision. For example, coherent light interference may need very precise separation distances between components to achieve accurate relative phases. Last but not least, the logic level shall be independent of loss. When a light signal propagates, it will inevitably suffer power loss and the logic level threshold between 0 and 1 will change, which mitigates against this requirement.

Based on the discussions above, several additional comments for all-optical logic gate computing are given below. First, in electronic computing, individual logic gate components are implemented first and a more complicated logic circuit system is constructed with multiple individual gates. A large-scale logic computing system can be constructed by an assembly of small-scale logic computing blocks. Since serial interconnections and cascading of fundamental components can be easily accomplished in electronics, the “construct a building from bricks” mechanism stated above becomes a feasible option. But photonics supports more parallel multiplexing and less serial interconnection compared with electronics. In optical logic gate computing, it may not be necessary to exactly follow and replicate the electronic logic gate computing mechanism. Novel optical logic computing architectures can be developed²⁴⁸. For example, a complicated logic computing system can be modeled as a single “black box” in optics instead of being decomposed into more fundamental individual components. Second, in optical analogue computing, optical neural network has been extensively investigated in recent years and much progress has been made. A neural network consisting of many layers of neurons and a logic circuit computing system consisting of many interconnected individual logic gates have some similarity. They both involve linear weighted summation and nonlinear mathematical calculation. Binary neural networks have more common features than logic computing systems. In fact, a simple neural network can be used to model any type of logic gate or a basic logic circuit accurately. The bridge between optical analogue computing and optical logic gate computing may be built in future works. Third, in both optical analogue computing and optical logic gate computing, the lack of optimal nonlinear optical elements is a critical challenge. In optical neural network, the linear weight summation calculation can be realized successfully in several different ways. But all-optical nonlinear activation functions are much more difficult to realize. For microscale and nanoscale optical logic gates with on-chip waveguides and photonic crystal structures, linear interference of coherent light signals is one approach but it has several limitations. The nonlinear optical effects are more promising. However, currently, there is almost no ideal optical nonlinear effect with simultaneous low-power excitation, fast response and easy implementation. This obstacle hinders the development of optical logic gate, optical neural network and other optical computing research works. The investigation on emerging highly nonlinear optical materials^{249, 250} may open up new potential opportunities.

Nowadays, many research works only focus on the implementation of an individual optical logic gate. However, it is obvious that the implementation of a computer system or a logic circuit system for performing complex tasks (e.g. artificial intelligent tasks) is the final objective. A larger scale optical logic computing system can be attempted by using many individual logic gates as fundamental building blocks. At the moment, some devices consisting of multiple logic gates have been implemented such as a canonical logic units-based programmable logic array (CLUs-PLA)²⁴¹, half-adder and half-substractor^{145, 162, 200, 242}, minterm²⁴³, S-R flip-flop²⁴⁴, divider circuit²⁴⁵ and encoder & comparator²⁴⁶. At all events, more advanced systems remain to be further investigated in future. It is favorable that a photonic chip integrated with massive optical logic gates can be eventually implemented with novel silicon photonics technologies. Apart from building a universal optical computer, optical logic gates may exhibit their unique advantages in some specialized applications. In addition to the well-known all-optical signal processing application for fiber communications, other new application scenarios such as optical data storage²⁴⁷ can be explored further.

In this paper, the authors mainly focus on all-optical logic gate computing. An alternative third approach in addition to all-optical logic gates and electronic logic gates is that electronics and photonics can be integrated for logic gate design^238-240. The cooperation of electronics and photonics can be realized in various ways. One typical example is optical directed logic²³⁸ where electronic signals are employed to control the status of optical switches to perform logic gate functions. In this case, the logic gates have electronic input signals and photonic output signals. The optoelectronic logic gate schemes can combine the advantages of both optical computing and digital computing. They are relatively more consistent with the current electronic computing platforms. However, all-optical logic gate computing schemes are free of mutual conversion between electronic signals and optical signals. They can be directly applied to many optical sensing, communication and display applications. In addition, the inherent advantages of photonics over electronics can be better fully utilized by all-optical logic gates.

It has to be pointed out that significant achievements have been made in the field of all-optical logic gate design in recent decades. While, a number of critical challenges are yet to be overcome before the technology can move from the laboratory into a real world of complicated environment in the future, the exploration of new materials and systems will be an effective way to improve an all-optical logic gate computing system. It can be predicted that with further research, there will be more powerful and more practical all-optical logic gate computing systems.

This paper reviewed achievements in the area of all-optical logic gate computing, where five different major types of schemes reported in the last decades were demonstrated and discussed, including spatial encoding of light fields, SOA, HNLF, microscale and nanoscale waveguides, and photonic crystal structures. All the methods presented above involve largely different working principles and present diverse advantages. Besides, other solutions are also reported in previous literature such as EIT effect^{227, 228}, electro-optic effect with MZI^229-232, optical gradient force²³³, vertical-cavity surface-emitting laser (VCSEL)^{234, 235} and black arsenic–phosphorus²³⁶. To sum up, a huge amount of macroscale, microscale and even nanoscale optical systems have proved to be potential candidates for all-optical logic gate systems. In practical experiments, Boolean logic rules can be implemented optically. Great progress has been made in the design of high-speed, compact, low-power-consumption and integrated all-optical logic gates. Although phased progress has been made, all-optical logic gates remain mainly at the laboratory research stage and still have a long way to go before industrial applications are realized.

It is almost impossible to satisfy all these requirements in any of the optical logic gate schemes reviewed in this paper. There will be much space for further improvement from all these aspects in future works. In addition to the basic requirements stated above, optical logic gates are expected to demonstrate advantages over electronic logic gates in terms of common metrics such as speed of operation, device size, power efficiency and extinction ratio. More comparative studies between real electronic and optical logic gate systems can be conducted in future works.

Acknowledgements

This work is partially supported by the National Key Research and Development Program of China (Grants No.2021YFA1401500), the National Natural Science Foundation of China (12022416), the Department of Natural Resources of Guangdong Province (No. GDNRC[2022] 22), Department of Science and Technology of Guangdong Province (No. 2021A0505080002), Intelligent Laser Basic Research Laboratory (No. PCL2021A14-B1), and the Hong Kong Research Grants Council (16306220).

Competing interests

The authors declare no competing financial interests.

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- Corresponding author: Shuming Jiao, jiaoshm@pcl.ac.cn On this Site On Google Scholar
  SM Jiao, E-mail: jiaoshm@pcl.ac.cn
  - Peng Cheng Laboratory, Shenzhen 518055, China
- Corresponding author: Junwei Liu, liuj@ust.hk On this Site On Google Scholar
  JW Liu, E-mail: liuj@ust.hk
  - Department of Physics, The Hong Kong University of Science and Technology, Hong Kong 999077, China
- Liwen Zhang On this Site On Google Scholar
  - Peng Cheng Laboratory, Shenzhen 518055, China
- Feihong Yu On this Site On Google Scholar
  - Department of Electrical and Electronic Engineering, Southern University of Science and Technology, Shenzhen 518055, China
- Guomeng Zuo On this Site On Google Scholar
  - Peng Cheng Laboratory, Shenzhen 518055, China
  - Department of Electrical and Electronic Engineering, Southern University of Science and Technology, Shenzhen 518055, China
- Jingming Zhang On this Site On Google Scholar
  - Department of Electrical and Electronic Engineering, Southern University of Science and Technology, Shenzhen 518055, China
- Fang Zhao On this Site On Google Scholar
  - Department of Electrical and Electronic Engineering, Southern University of Science and Technology, Shenzhen 518055, China
- Weihao Lin On this Site On Google Scholar
  - Department of Electrical and Electronic Engineering, Southern University of Science and Technology, Shenzhen 518055, China
- Corresponding author: Liyang Shao, shaoly@sustech.edu.cn On this Site On Google Scholar
  LY Shao, E-mail: shaoly@sustech.edu.cn
  - Peng Cheng Laboratory, Shenzhen 518055, China
  - Department of Electrical and Electronic Engineering, Southern University of Science and Technology, Shenzhen 518055, China

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Open Access. © The Author(s). This article is licensed under a Creative Commons Attribution 4.0 International License. To view a copy of this license, visit http://creativecommons.org/licenses/by/4.0/.

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DOI: 10.29026/oes.2022.220010

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Shuming Jiao, Junwei Liu, Liwen Zhang, et al. All-optical logic gate computing for high-speed parallel information processing. Opto-Electronic Science 1, 220010 (2022). DOI: 10.29026/oes.2022.220010

Shuming Jiao, Junwei Liu, Liwen Zhang, et al. All-optical logic gate computing for high-speed parallel information processing. Opto-Electronic Science 1, 220010 (2022). DOI: 10.29026/oes.2022.220010

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- Received Date May 24, 2022
- Accepted Date June 26, 2022
- Published Date September 06, 2022
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Article Contents
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Abstract

Keywords

Introduction

Spatial encoding of light field

Semiconductor optical amplifiers (SOA)

Highly-nonlinear fiber (HNLF)

Microscale and nanoscale waveguide

Photonic crystal structures

Discussion, future prospect and conclusion

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NOT	AND	NAND	OR
$\overline{A}$	$\text{AB}$	$\overline{\text{AB}}$	$\text{A+B}$


NOR	XOR	XNOR
$\overline{\text{A+B}}$	$A \oplus B$	$\overline{A \oplus B}$

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Types of gates	Optimal parameters			Output light intensities for different input values				Output intensity contrast ratios
Types of gates	α	β	γ	$\left({{\text{0}},{\text{0}}}\right)$	$\left({{\text{1}},{\text{0}}}\right)$	$\left({{\text{0}},{\text{1}}}\right)$	$\left({{\text{1}},{\text{1}}}\right)$	Output intensity contrast ratios
OR	${\text{1}}$	${{\text{e}}}^{\frac{{\text{i}}{\text{2}}{\text{π}} }{{\text{3}}} }$	${\text{0}}$	${\text{0}}$	${\text{1}}$	${\text{1}}$	${\text{1}}$	Infinity
AND	$\dfrac{\text{2}} {\text{3}}$	$\dfrac{\text{2}} {\text{3}}$	$-\dfrac{\text{1} }{\text{3} }$	$\dfrac{\text{1}} {\text{9}}$	$\dfrac{\text{1}} {\text{9}}$	$\dfrac{\text{1}} {\text{9}}$	${\text{1}}$	9∶1
NOT	${\text{1}}$	${\text{0}}$	$-{\text{1}}$	${\text{1}}$	${\text{0}}$	${\text{1}}$	${\text{0}}$	Infinity
NAND	${\text{1}}$	${{\text{e}}}^{\frac{{\text{i}}{\text{2}}{\text{π}} }{{\text{3}}} }$	${{\text{e}}}^{-\frac{{\text{i}}{\text{2}}{\text{π}} }{{\text{3}}} }$	${\text{1}}$	${\text{1}}$	${\text{1}}$	${\text{0}}$	Infinity
NOR	$\dfrac{\text{2}} {\text{3}}$	$\dfrac{\text{2}} {\text{3}}$	$-{\text{1}}$	${\text{1}}$	$\dfrac{\text{1}} {\text{9}}$	$\dfrac{\text{1}} {\text{9}}$	$\dfrac{\text{1}} {\text{9}}$	9∶1
XOR	${\text{1}}$	$-{\text{1}}$	${\text{0}}$	${\text{0}}$	${\text{1}}$	${\text{1}}$	${\text{0}}$	Infinity
XNOR	${\text{1}}$	${\text{1}}$	$-{\text{1}}$	${\text{1}}$	${\text{0}}$	${\text{0}}$	${\text{1}}$	Infinity

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All-optical logic gate computing for high-speed parallel information processing

Abstract

Keywords

Introduction

Spatial encoding of light field

Semiconductor optical amplifiers (SOA)

Cross-gain modulation (XGM)

Cross-phase modulation (XPM)

Four-wave mixing (FWM)

Cross-polarization modulation (CPM)

SOA-assisted interferometric architectures

SOA-MZI configuration

Sagnac interferometer configuration

Highly-nonlinear fiber (HNLF)

Microscale and nanoscale waveguide

General logic gate implementation with waveguide

Periodically poled lithium niobates (PPLNs) waveguide

Microring resonator waveguide

Surface plasmon polariton (SPP)

Nanowire

Photonic crystal structures

Interference of self-collimated light

Multi-mode interference (MMI)

Linear interference with phase difference

Microring resonator structure

Nonlinear effects

Discussion, future prospect and conclusion

Acknowledgements

Competing interests

References

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Guomeng Zuo On this Site On Google Scholar

Jingming Zhang On this Site On Google Scholar

Fang Zhao On this Site On Google Scholar

Weihao Lin On this Site On Google Scholar

Corresponding author: Liyang Shao, shaoly@sustech.edu.cn On this Site On Google Scholar