A high-performance CMOS FDMA for pulsed TOF imaging LADAR system
Jiang Yan1,2, Liu Ruqing1, Zhu Jingguo1, Wang Yu1     
1. Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China;
2. University of Chinese Academy of Sciences, Beijing 100049, China

Overview: As an active optical remote imaging technology, the laser detection and ranging (LADAR) system shows an enormous potential in industrial and civil applications with the rapid development of unmanned aerial vehicle (UAV), and so on. Recently, LADAR are constantly developing towards integration, miniaturization and arraying in order to achieve higher detection and wider range of application. For the whole detection system, the performance height of the receiver circuit can directly determine the application height of the system. The amplifier receiver of the LADAR system which converts the small optical pulse signal into an electrical pulse mainly includes two parts: a photoelectric detector and the analog front-end circuits. Since the transmit power of the pulse laser are limited and considering the safety of human eyes, in active imaging systems the performance of the amplifier receiver becomes a critical issue. Therefore, a high-performance main amplifier is a key component to the LADAR system. This paper presents a high bandwidth and low noise fully differential main amplifier (FDMA) for the pulsed time-of-flight (TOF) imaging laser detection and ranging application, which is used to amplify the small pulse echo signal. To meet the entire system bandwidth requirements, the four levels cascaded architecture and active inductor technology are designed to enlarge the bandwidth of the circuit and reduce the chip area. The cascaded gain stages, which adopted DC offset isolation circuit, are more robust to the alteration of process and temperature compared to the traditional structure. A large bandwidth amplifier (LBA) and an output buffer (OB) structure has been designed to enhance the drive capabilities. Besides, in order to adapt the demand of the LADAR system, the amplifier receiver’s bandwidth has been limited to improve the SNR by use of the inter-stage bandpass filter which reuses the DC offset isolation circuit. For the temperature variation of -40 ℃ to 85 ℃, the simulated results have confirmed the performances of the high bandwidth and low noise fully differential main amplifier. The proposed design was implemented and fabricated in CSMC CMOS technology. The measurement results show that the chip realizes the -3 dB bandwidth of 730.6 MHz, and an open loop gain of 23.5 dB with the bandpass filter worked. The input-referred noise voltage is 2.7 nV/sqrt(Hz), which effectively reduces the system noise. This chip that occupies 0.25 mmc×0.25 mm in area consumes a power dissipation of 102.3 mW from the 3.3 V power supply. As a part of the integrated chip of the laser radar system, it can better meet the requirements of system and it shows good performance.

Supported by the National Science Foundation of Youth Fund (61605216)